It has a lot of features that increase different aspects of the CPU performance to new levels, never seen before.Most importantly, the instruction fetch rate is increased from 16 to 32 bytes per clock cycle. There are six integer ALUs, four address generation units, three branch units, four vector ALUs, and two vector read/write units. It is possible to do six simple integer instructions per clock cycle. Vector instructions and floating point instructions can execute at a rate of two vector additions, two vector multiplications, and two vector read or write instructions simultaneously per clock cycle. The Zen 5 can execute two predicted taken branches or three predicted not-taken branch instructions per clock cycle.