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Nvidia GB10's Memory Subsystem, from the CPU Side

created: Dec. 31, 2025, 12:43 p.m. | updated: Jan. 1, 2026, 3:55 a.m.

All A725 cores get 512 KB L2 caches, and all X925 cores get 2 MB of L2. While it’s not a spectacular L3 latency result, it’s at least similar to Intel’s Arrow Lake L3 in nanosecond terms. Combined with the larger L2, that gives GB10’s X925 cores a cache setup that’s better balanced to deliver high performance. It’s almost like the X925 cores don’t know when to slow down to avoid monopolizing memory subsystem resources. Splitting out achieved bandwidth from the CPU and GPU further shows the GPU squeezing out the CPU bandwidth test threads.

1 day, 11 hours ago: Hacker News